The present invention relates to a plastic-molded semiconductor device, which comprises a semiconductor pellet having an insulating substrate such as a sapphire substrate and an integrated circuit formed on the insulating substrate, and a pellet mounting member on which the semiconductor pellet is mounted.
Recently the SOS (Silicon On Sapphire) technique and the SOI (Silicon On Insulator) technique have been developed, because they improve the performance of an integrated circuit. Using these techniques, a single crystal silicon is vapour-deposited on an insulating substrate, such as a sapphire substrate, and an integrated circuit is formed on the single crystal silicon. The integrated circuit has the characteristic that its interconnection layer has a smaller parasitic capacitance and a higher insulating resistance than an integrated circuit on a bulk substrate. This results in a high speed and a low power dissipation.
However, when the semiconductor pellet manufactured by the SOS or SOI technique is mounted on the conductor of the mounting bed of a lead frame, a considerable parasitic capacitance is produced, because the interconnection layer, the conductor of the mounting bed, the insulating substrate, and an SiO.sub.2 layer constitute a capacitor. This capacitance makes it difficult for the integrated circuit to operate at a high speed.